1. Field of Invention
The present invention relates to the integrated circuits. More particularly, the present invention relates to a glitch filter.
2. Description of Related Art
Electronic circuits are subject to signal distortion and noise in operation. The signal distortion and the noise may significantly reduce the performance of the electronic circuits. In certain cases, the signal distortion and the noise may even cause the operation of the electronic circuits failed. For example, there exists a noise “glitch”, which is often considered as an aperiodic noise in the operation of the electronic circuits.
FIG. 1A is a circuit diagram of a glitch filter 100 according to the prior art. As shown in FIG. 1A, the glitch filter 100 includes a high glitch filter 120 and a low glitch filter 140, and the high glitch filter 120 is connected to the low glitch filter 140 in series. At first, an input signal Vin is sent to one of the inputs of the NAND gate 122 directly and to another one of the inputs of the NAND gate 122 through a rising edge delay cell 124 which provides a delay time tdr on the rising edge of the input signal Vin, and the high glitch with pulse width less than the delay time tdr will be filtered. Second, the output of the high glitch filter is connected to the one of the inputs of the NOR gate 142 and to the another one of the inputs of the NOR gate 142 through a falling edge delay cell 144 which provides a delay time tdf on the falling edge of the input signal Vin. Thus, the low glitch with pulse width less than the delay time tdf will be filtered.
FIG. 1B is a wave diagram of the glitch filter 100 according to the prior art. As shown in FIG. 1B, if the input signal Vin oscillates during its enabling period (i.e., the time being logic “1”), the glitch filter 100 is expected to output a smooth signal with high logic level. However, in practical application, the glitch filter 100 filters the first high glitch and makes the low glitch wider than working range of the glitch filter 100, and the glitch filter toggles its output to low logic level for a while. In this case, the aforementioned low logic level is considered as a loophole, which refers to that the glitch filter 100 cannot correctly filter the input signal Vin. Further, as shown in the FIG. 1A, the glitch filter 100 may add more delay to the edges of the input signal Vin, which has some impact to the certain propagation delay sensitive circuit.
Therefore, a heretofore unaddressed need exists in the art to address the aforementioned deficiencies and inadequacies.